Test and inspection articles for bare board and assembled PCB - coverage strategies, defect types, when to add ICT or FCT, and how XFPCB builds reliable quality gates into manufacturing.
CAD annular ring assumes a centered finished hole. The drill is larger, plating and layer shift change what is left, and Class 2 and Class 3 do not judge the same ring.
A cavity is a routed pocket, not a slot or a backdrill. Name the side, the depth datum, whether the floor may show copper, and an inside corner the cutter can really make.
Electrical test only sees copper that a probe can actually land on. Which nets deserve a pad, why a tented via cannot be one, and when boundary scan is the access instead.
How IEC 60601-1 creepage, clearance and solid-insulation barriers on medical PCBs get eroded by thieving, laminate swaps, slots and assembly residue, and what to lock on the drawing.
Metal core PCB applications from the factory side: what LED, automotive lighting, power, motor drive and RF uses demand from the board, how each fails, and when not to use one.
A factory walk through metal core PCB fabrication, from laminate to hi-pot test, showing which step causes burrs, scratches, edge cracks and leaks, and what to specify.
How heat leaves a part on a metal core PCB: pad, copper spreading, dielectric, base, interface and heat sink, with simple thermal-resistance arithmetic and prototype checks.
Microstrip and stripline from the factory side: which process variables move each line's impedance, how mask, finish and vias matter, and what each costs to build and verify.
Why multilayer ceramic capacitors crack during PCBA, from depaneling and screws to hand soldering, with layout, part choice and strain checks that keep cracks out of the field.
An open circuit explained for PCB teams: voltage, current and resistance at the break, why the symptom depends on which net opens, floating nodes, and what 'open' means in test.
Where insertion loss comes from on a PCB trace and which board choices buy it back: trace length and width, laminate Df, copper roughness, via stubs, backdrill and loss coupons.
Bench guide to continuity testing on assembled PCBs: what a beep proves, false closed and false open readings, diode-mode pin checks, low-ohm measurement and intermittent opens.
Lamination voids, delamination, blisters and measling are different defects with different causes. How each forms, how microsections tell them apart, and what buyers can control.
Where PCB open circuits start in fabrication and assembly, the signature each leaves, why some pass bare-board test and open after reflow, and which check finds each cause.
SMT advantages on a legacy through-hole board: fewer process steps, consistency and part supply, which parts should stay THT, and what to re-verify before the first SMT build.
FR-4 is a family, not a recipe: glass cloth, epoxy, curing agent, fillers and flame retardant. What each does, how laminate is made, and how to read Tg, Td, T288 and CTE values.
For aerospace-intent PCBA, equipment matters through the evidence it leaves: lot-to-serial traceability, SPI data, measured reflow profiles, inspection criteria and calibration.
How etch, dielectric thickness, Dk, glass weave, via stubs and plane voids shift reflections, crosstalk and skew lot to lot, and how to specify high-speed boards for margin.
Follow one PCBA from incoming parts to packing: what each checkpoint (SPI, first article, AOI, X-ray, THT, rework, final QA) proves and what records buyers should require.
Locate where PCB warping started (incoming bare board, reflow, or package-to-board mismatch at temperature), collect the right evidence, and assign the fix to the right owner.
Factory playbook for HDI flex micro-bump arrays: use-case selection (solder flip-chip/CSP vs probe/compression vs through-dielectric), window/process route, metal stack vs contact duty, height and coplanarity acceptance, drawing notes, FAI, and China fab RFQ checklist — confirm µm/pitch guidance with your fab.
Factory playbook clarifying flip board PCB search intent: flip-chip attach vs EDA mirror, DCA bare die vs finished FC-BGA, board DFM (fan-out/VIP/HDI, SI/PDN, thermal/CTE, datasheet land pattern), underfill + X-ray/SAM inspection, reliability RFQ language, and a China fab/EMS comparable checklist — confirm pitch/void/warpage with your plant.
Factory playbook for flying-lead / dual-access FPC: same Cu exposed both sides (coverlay + base film removal) ≠ double-sided via interconnect, 1S vs 2S complexity, use-case triggers, pre-cut coverlay limits vs laser/plasma/chemical for small windows (~1.0 mm class — confirm with fab), design notes, FAI, and China fab RFQ checklist.
Factory playbook for flying probe electrical test: fixtureless FPT vs bed-of-nails ICT volume/setup gate, bare board vs PCBA coverage (opens/shorts/R/C/polarity vs not full FCT), DFT pad/spacing/fiducial/BGA-breakout guidance to confirm with fab, programming file pack, AOI/X-ray/FCT stack, and China fab/EMS RFQ checklist.
Factory final-gate playbook: place FQC in the IQC→IPQC→AOI/ET→FQC→OQA buyer chain, bare PCB vs PCBA FQC scope, what FQC does not catch, and outbound packing RFQ (clean→MBB/desiccant/HIC→ESD if PCBA→cushion→labels→QC docs) with confirm-with-fab moisture/ESD class language and a comparable China fab checklist.
Factory playbook for powered FCT: when to power on after AOI/X-ray/flying-probe-or-ICT, volume gate from bench to reusable nest to custom fixture, what FCT catches that structural tests miss, what it does not replace, DFT for power/debug/fixture/golden-board, and China fab/EMS RFQ checklist (pass/fail, firmware rev, fixture ownership, cycle class, data logs).
Why PCB testing matters for overseas buyers awarding China fab/PCBA — escaped-defect cost, inspection vs electrical/FCT, RFQ locks, quote line items, Class 2 vs 3.
Buyer matrix: bare e-test (flying probe vs nails) vs ICT/FCT; AOI/X-ray as inspection not proof; fixture payback; China RFQ coverage, Class 2 vs 3 depth.
Factory buyer guide: when SMT, when THT, when mixed-tech; China PCBA RFQ (paste stencil, wave/selective, Class fill, AOI vs X-ray, pad DFM). Soft hybrid CTA.
Buyer decision guide: when to require X-ray/AXI on PCBA — BGA QFN hidden joints, void criteria, 2D vs 3D, sampling vs 100%, China fab RFQ coverage language.
Factory guide to embedded resistors PCB: thin-film planar process (8 steps, 3 etches), outer mask vs inner bury, chem drift after micro-etch/brown, CAM compensate, laser trim, SMT vs embed, and China fab RFQ + coupon acceptance.
Pure flex FPC bend radius for dynamic bend life: neutral-axis copper placement, stackup symmetry, radius vs thickness starting guidance to confirm with fab, and drawing/RFQ callouts (bend line, direction, cycle target) for China fab quotes — not rigid-flex failure autopsy or keyboard FR-4 flex-cut.
China-fab DFM for FPC/FFC ZIF connector tails: datasheet thickness, pad/contact side, stiffener edge vs pad root, coverlay registration, ENIG vs hard gold, and fast-turn RFQ traps when the connector PDF is missing.
Factory-practical PCB warpage guide for overseas buyers: bow vs twist, IPC-style % of diagonal limits to confirm with fab, stackup/copper balance, moisture/bake, reflow pallet support, measurement language, and RFQ checklist for fab+SMT yield — not laminate CTE theory alone.
Factory guide to identifying PCB components: active/passive, THT vs SMD, designators, polarity/pin-1, packages, substitution RFQ rules, AOI checkpoints, and CPL/BOM fields for China assembly.
Factory-practical PCBA FAI checklist for overseas buyers: BOM revision lock, feeder/program setup, polarity, SPI/AOI/X-ray roles, power-up gate, FAI report contents, and when to stop the lot before full release.
How to tell if a printed circuit board is bad: unpowered signs, safe test order, short-to-ground method, and a repair vs scrap matrix for buyers and techs.
RFQ-ready PCB inspection guide for procurement and QA: inspect vs test, SPI for paste risk, AOI limits under BGA, when to require X-ray, flying probe vs ICT by volume, China fab tiers, and pasteable coverage clauses.
NPI guide to how a fabricated PCB validates schematic intent: what ERC/DRC/DFM catch before copper, what only a physical prototype proves (SI, PDN, fit, thermals, solderability), DFT bring-up habits, fab ET/AOI vs functional plans, and purposeful China fab prototype RFQs.
Shop-floor guide to PCB repair vs replace: unpowered look/smell/magnify checks, heat vs power-rail failure families, solder fatigue vs corrosion, and remake RFQ notes after field returns.
Depending on the job: electrical test, AOI, X-ray for BGA/QFN, flying probe, ICT, and functional test when fixtures or scripts are available. Requirements belong in the RFQ notes.
How do I specify test coverage in an order?
State required inspections, accept criteria, and any fixture or golden-sample needs in the manufacturing notes, or ask Technical Support before release.