Deep technical articles on PCB materials, fabrication processes, and manufacturing capabilities - from copper weight and high-Tg laminates to HDI microvias, impedance control, and assembly process detail.
Once a via stub has to go, the fab needs a side, a must-not-cut layer, a maximum residual stub and a drill size. A single depth in millimetres is not that instruction.
Read articleNon-functional via pads from the CAM side: removal in layout or at the fab, how CAM finds them, which holes to exempt, and fab note wording that keeps data and board aligned.
Read articleWhy automotive heat, vibration, and power abuse force fab/assy choices — plus a China fab RFQ checklist for Tg, copper, flex, and inspection gates.
Read articleBuyer guide: conductive ink vs etched PCB; Ag/Cu/carbon/polymer tradeoffs; when print wins vs China rigid/flex fab; hybrid RFQ fields (Ω/□, cure, bend).
Read articleIPC multilayer PCB classification for buyers: Type 3/4, HDI types, Class 2 vs 3 at high level, China fab RFQ locks — factory paraphrase, not IPC reprint.
Read articleFactory/buyer latching (bistable) 12V relay wiring on PCB: set/reset vs single-coil pulse, flyback/TVS, copper, isolation, DFM/RFQ for China fab+assembly.
Read articleFactory buyer guide: PCB photoimaging vs wafer lithography; resist→expose→develop→etch; LDI vs film; RFQ fields for trace/space, ring, registration.
Read articleProcurement reality check — printed sensor vs etched Flexible PCB / rigid-flex, substrate-ink stack RFQ, China fab vs specialty PE, test locks, soft CTA.
Read articleBuyer China-fab material gates — Tg/Td/CTE, Dk/Df, FR4 vs polyimide vs PTFE vs flex vs metal-core, plus RFQ stackup/Tg/CAF/lock-vs-equivalent callouts.
Read articleAnswer-first China-fab guide to AS9100 for aerospace HDI PCBs: QMS vs product class, why HDI helps weight/size, material and via callouts, and RFQ fields that stop certificate-only buying.
Read articleAnswer-first factory guide for EAGLE CAD users: schematic-to-board workflow, placement and DRC habits, Gerber/drill/BOM packages China fabs actually open, and RFQ notes that cut CAM EQ loops.
Read articleAnswer-first factory guide to differential pair routing: Zdiff targets, spacing/length matching, via symmetry, split-plane traps, and China-fab RFQ fields that make controlled-impedance quotes real.
Read articleCompare KiCad, Altium, OrCAD X, Allegro X, Fusion 360/EAGLE, and DipTrace from a China fab view: pick by complexity, ship clean Gerber and notes.
Read articleSMT history from hybrid chips to BGA/CSP densification: what pitch shrink did to print, SPI, reflow, and the RFQ language buyers paste for yield control.
Read articleChina fab PDN guide for overseas buyers and technicians: what a PDN is as a current loop, why HDI makes power integrity harder, Ztarget with a worked example, capacitor ladder and anti-resonance traps, PWR/GND plane capacitance from dielectric thickness, VIP fill/cap and BGA power-via budgeting, simulation when it pays, failure map, and RFQ fab notes.
Read articleFactory-focused guide to cold solder joints for overseas PCB/PCBA buyers: IPC acceptance, AOI and reflow controls, identification, rework steps, and RFQ language that prevents intermittent field fails.
Read articleBuyer and engineering guide to commercial aviation PCBs: aircraft applications, reliability vs standard boards, environmental stresses, materials and constructions, manufacturing traceability, and RFQ criteria that avoid AS9100/DO-160 myths when sourcing China fabs.
Read articleBuyer guide to conductive anodic filament (CAF) in PCBs: latent field shorts, how copper filaments form along glass/resin under moisture and DC bias, layout rules for fab notes, and China RFQ questions on CAF-resistant laminates, bake, cleanliness, and real tests--without fake cert claims.
Read articleFactory buyer guide to connected SMD pads: AOI yield escapes when same-net copper merges solderable areas, electrical vs solderable distinction, bridge/starvation/tombstone inspection language, copper and via traps, and what CAM/SMT ask for in footprints--without an FAQ pad.
Read articleFactory buyer guide to consumer electronics rigid-flex: why copying aerospace stacks spikes NRE, what CE builds actually need, density-cost levers on quotes, and process windows that protect panel yield.
Read articleFactory buyer guide to controlled impedance PCBs: why a two-word fab note triggers CAM hold, what a complete impedance table must include, geometry authority for width changes, coupon/TDR lot evidence, and etch-mask-weave traps that fail TDR.
Read articleFactory guide to copper-base PCB OSP: red discoloration after reflow as oxidation not scrap by default, what OSP does on the shop floor, LED thermal-pad void risk, open-bag and no-bake storage rules, and when to switch to ENIG.
Read articleFactory buyer guide to copper clad laminate: why fab notes that only say FR-4 stall CAM, CCL stack on the panel, Tg/Td/CTE/Dk/Df dials, frequency and reflow filters, when to step to metal-core or low-loss, and slash-sheet callouts.
Read articleFactory guide to PCB copper foil: loss budget vs peel strength on real RFQs, what foil means on a laminate datasheet, ED vs RA from fab stock, when VLP/HVLP/RTF is enough vs RA mandatory, specialty foils, and fab-note lines that stop silent substitution.
Read articleFactory guide to HTE Grade 3 and low-roughness copper foil for multilayer/HDI: PTH crack risk after lead-free reflow, copper teeth vs etch and impedance, RTF as adhesion/smoothness compromise, high-perf resin bonding, and CAM-readable foil callouts.
Read articleClear no: a CPU cannot be an RF amplifier. Digital switch physics vs RF power devices, what a PA chain needs on the board, PCB-as-circuit rules (50 ohm, match, GND, thermal), when FR-4 fails, and RFQ notes for RF PA boards from a China fab.
Read articleChina fab guide to custom PCB material as a stack decision: FR-4 vs high-Tg vs low-loss vs metal-core, three gates (frequency, thermal, heat path), hybrid Rogers/FR-4 when only RF nets need low-loss, and prototype vs production stock for RFQs.
Read articleClarify both meanings of standard PCB (modules vs fabricator standard-spec), when modules fit early products, when FR-4 quick-turn is the middle lane, and when custom stack, HDI, shape, or RF pays -- plus how RFQs differ.
Read articleFactory guide for SoC-to-DDR layout: why serpentine-first boards fail bring-up, reference design as a map, placement and orientation, stackup/impedance with the fab, dogbone/microvia/VIP fanout, byte-lane group routing, and length matching last -- plus what DFM asks on DDR RFQs.
Read articleShop-floor decoupling placement for HF PCBs: lab symptoms that look like SI but are PDN loops, pin-cap-via-return geometry, multi-value networks without anti-resonance superstition, plane spacing, BGA underside vs QFN same-side, and VIP/package fab notes.
Read articleChina fab guide to flex cable EMI shielding: silver paste vs carbon vs Al foil vs copper/hatch vs laminated EMI film, coverlay ground windows, dynamic bend vs static, and why a shield is not an impedance reference plane -- plus RFQ notes on shield zone, bend zone, and stiffeners.
Read articleChina fab guide to functional flex: vacuum NiCr and TCR/Pyralux-class resistor foils, embedded R vs 0402, strain gauges on polyimide, and why functional films stay out of dynamic bend -- plus RFQ notes on sheet ohms, coverlay, and zone maps.
Read articleChina fab guide to high-power PCB design: high-power vs high-current vs high-voltage, IPC-2152 conductor sizing beyond ounces, heat paths and thermal via arrays, materials ladder, HV creepage, and heavy-copper fab notes for etch, space, and plating.
Read articleFactory buyer guide to PCB conformal coating: when coating is over-specified, acrylic/silicone/urethane/epoxy/parylene tradeoffs, keep-outs and thickness windows on the PCBA line, UV inspection acceptance language, and quote fields that prevent surprises--without an FAQ pad.
Read articleBGA fanout and escape routing for multilayer PCBs: dog-bone vs via-in-pad, stackup layer math, NSMD pads, via rules, and SI practices before tape-out.
Read articleBGA soldering realities for PCBA buyers: paste and VIP prep, reflow ownership, X-ray void criteria, and China fab inspection language that protects yield.
Read articleClarify Bluetooth adapter vs receiver vs transmitter for hardware teams: signal direction, RF/audio blocks, module procurement, and PCBA tests that matter.
Read articleWhen bookbinder rigid-flex constructions improve short-bend reliability: staggered flex lengths, free-flex contrast, stackup limits, and China fab quoting questions.
Read articlePractical capacitor capacitance and voltage selection for PCB/PCBA buyers: what farads mean, voltage margins, MLCC bias, and BOM fields that prevent wrong parts.
Read articleWhen carbon composition resistors still earn a place versus pulse-rated film and thick-film SMT parts: inductance, pulse energy, availability, and PCBA practicality.
Read articleChoose AlN or Al2O3 ceramic PCBs with clearer thermal and cost logic: conductivity ranges, DBC/DPC notes, size limits, and RFQ language for overseas buyers.
Read articleDeep chip-resistor guide for overseas PCBA: thick vs thin film and MELF, imperial/metric sizes, 3-/4-digit codes, power derating on copper, anti-sulfur, and BOM/DFM pitfalls.
Read articleHigh-speed backplane layout for buyers: connector/PDN planning, impedance, back-drill stubs, thick-board plating, warpage, and RFQ packages that price manufacturing risk.
Read articleSelect multilayer chip inductors (MLCI) for filtering and PI: structure, Q limits vs wirewound, flux leakage, package DFM, and when not to use MLCI.
Read articleHow to clean assembled PCBs after soldering: flux types, IPA vs aqueous wash, ionic contamination risk, drying rules, and when ultrasonic cleaning is unsafe.
Read articleSMD inductor overview for PCB teams: wirewound vs multilayer, key datasheet specs, multimeter checks, and assembly tips that prevent power and EMI surprises.
Read articleTypical PCB thickness choices from 0.4 mm to 3.2 mm: mechanical fit, copper weight, impedance spacing, warpage, and when to deviate from 1.6 mm defaults.
Read articleWhat changes from 24 GHz to 77 GHz radar PCB fabrication: loss budgets, etch tolerance, hybrid stackups, and RFQ notes that keep antenna resonance stable.
Read article5G RF front-end material decisions without overbuying: loss-budget first, hybrid stackup DFM, copper foil effects, moisture stability, and finish notes.
Read articleKeep aluminum electrolytics alive on PCBA: lifetime derating, ripple and heat distance, polymer vs wet choices, polarity inspection, and BOM alternate rules.
Read articleSpecify hard-gold edge fingers for wear life: thickness, nickel underplate, bevel, selective plating with ENIG pads, and DFM mistakes that damage connectors.
Read articleFine-pitch and bottom-terminated SMT process windows: stencil strategy, nitrogen role, void criteria, placement tooling, and design fixes that beat machine myths.
Read articleBGA/CSP yield planning: escape/HDI choices, filled via-in-pad, warpage control, X-ray void criteria, rework access, and underfill decisions by environment.
Read articlePlan PCBA by SMD IC package risk: SOP vs QFN vs BGA process windows, BOM pitch clarity, stencil and inspection methods, and mixed-package board realities.
Read articleTech focuses on materials, process physics, and factory capability. Design focuses on layout, stackup planning, and DFM choices that help boards pass review and manufacture cleanly.
See Technical Capabilities, PCB Materials, and PCB Fabrication Process pages on xfpcb.com for live manufacturing limits and process notes.